- Failure Analysis Service
We can do failure analysis of electronics in final product / system level, module / sub-system level, PCB level, and component level. Our approaches usually contain following items:
- Isolation of the failure location(s) via visual examination, basic electrical measurement and X-ray radiography;
- Physical failure analysis of the failure location(s) via electrical measurement, decapsulation examination, cross-sectional study, microscopic examination by SEM, chemical aspects study by EDX, XPS, etc.;
- Review the circuitries related to the failure location(s) and examine the PCB layout related to the failure location(s) to identify fault current path(s);
- Simulate / re-produce the failure phenomenon to verify the identified cause(s) of the failure;
- Data analysis, interpretation, logical inference and report preparation.
Our experts can analyze different failure mechanisms, e.g., electrical overstress (EOS) of PCB component(s), electrostatic discharge (ESD) induced damage in PCB component(s), electrochemical migration (ECM), short circuit even arcing due to tin whiskers, fatigue cracking of pin of terminal block connector, arcing due to appearance of foreign object(s), thermal degradation of package materials, contamination and corrosion, etc.
- Training Service
We provide the following training courses:
- ECM Failure and Prevention
- ESD Failure and Prevention
- EOS Failure and Prevention
- Design of bolted joints
- Trouble Shooting Service
ESD and EOS induced damage is common in PCB failures. We can provide trouble shooting service to identify the ESD and EOS source(s) after a comprehensive failure analysis of ESD / EOS induced damages in PCBs.
- Risk-based PCB Layout Design Review
Based on our failure analysis experiences, we classify risks in PCBs into several aspects, e.g., electrochemical, transient interference, mechanical, etc. We can provide risk-based PCB layout design review accordingly.
Regarding electrochemical aspect, we review the PCB layout design considering service condition (temperature, humidity, pollution), clearance and creepage distance, and PCB surface insulation resistance.
Regarding transient interference aspect, we review the PCB layout design considering sensitive ICs in it, potential ESD locations, potential transient sources, and board level protection method.
Regarding mechanical aspect, we review the PCB layout design considering board bending, board terminal connector, screw joints, vibration and / or thermal stresses.